A report that resulted from a workshop jointly funded by the Semiconductor Research Corporation (SRC) and National Science Foundation (NSF) outlines key factors limiting progress in computing — particularly related to energy consumption — and novel research that could overcome these barriers.
The findings and recommendations in the report are in alignment with the nanotechnology-inspired Grand Challenge for Future Computing announced on October 20, 2015, by the White House Office of Science and Technology Policy. The Grand Challenge calls for new approaches to produce computing systems capable of operating with the efficiency of the human brain. It also aligns with the National Strategic Computing Initiative announced by an Executive Order signed by the President July 29.
Energy efficiency is vital to improving performance at all levels. These levels range from devices and transistors to large information technology systems, and from small sensors at the edge of the Internet of Things to large data centers in cloud and supercomputing systems.
“Fundamental research on hardware performance, complex system architectures, and new memory/storage technologies can help to discover new ways to achieve energy-efficient computing,” said Jim Kurose, assistant director of NSF’s Directorate for Computer and Information Science and Engineering (CISE). “Partnerships with industry, including SRC and its member companies, are an important way to speed the adoption of these research findings.”
Performance improvements today are limited by energy inefficiencies that result in computing systems overheating and experiencing thermal management issues. The electronic circuits in computer chips still operate far from any fundamental limits to energy efficiency, and much of the energy used by today’s computers is expended moving data between memory and their central processors.
But, while the pace of performance increases has slowed, the amount of data computer users produce is exploding. By 2020, an estimated 44 zettabytes of data (one zettabyte equals one trillion gigabytes) will be created on an annual basis, according to a 2014 IDC study.
“New devices, and new architectures based on those devices, could take computing far beyond the limits of today’s technology. The benefits to society would be enormous,” said Tom Theis, Nanoelectronics Research Initiative (NRI) executive director at SRC, the world’s leading university-research consortium for semiconductor technologies.
In order to realize these benefits, a new paradigm for computing is necessary. A SRC- and NSF-funded workshop held April 14-15 in Arlington, VA, convened experts from industry, academia and government to identify key factors limiting progress and promising new concepts that should be explored. The October 20 report resulted from the workshop discussions and provides a guide to future basic research investments in energy-efficient computing.
The report builds upon an earlier one on Rebooting the IT Revolution, funded by the Semiconductor Industry Association, SRC and NSF.
Meeting the Nanotechnology Grand Challenge and the goals of the National Strategic Computing Initiative requires multi-disciplinary fundamental research on materials, devices and architecture. NSF and SRC, both individually and together, have a long history of supporting long-term research in these areas to address such fundamental, high-impact science and engineering challenges.
