A team of NIST scientists has devised and demonstrated a novel nanoscale memory technology for superconducting computing that could hasten the advent of an urgently awaited, low-energy alternative to power-hungry conventional data centers and supercomputers.
In recent years, the stupendous and growing data demands of cloud computing, expanded Internet use, mobile device support, and other applications have prompted the creation of large, centralized computing facilities at hundreds of thousands of sites around the world.
Such facilities typically run 24 hrs a day and employ arrays of semiconductor-based servers which require substantial amounts of electricity and generate correspondingly substantial amounts of heat—which in turn requires yet more energy to remove.
Even if the power needs for all U.S. data centers—estimated to grow from 72 TWh to 200 TWh by 2020, roughly 5% of all electricity consumed in the nation—can be met, the inherent constraints of semiconductor electronics will still set scaling and clock-rate limits on future processing capacity at a time when digital information volume is increasing exponentially.
One promising replacement technology is superconducting (SC) computing, which offers the prospect of moving information without loss over zero-resistance channels. Instead of using semiconductor transistors to switch electronic signals, SC systems employ tiny components called Josephson junctions (JJs). JJs operate near absolute zero (in the range of 4 K to 10 K), dissipate minuscule amounts of energy (less than 10-19 joule per operation), and can be switched between states at hundreds of billions times a second (frequencies of gigahertz), compared to a few gigahertz for semiconductor computers.
To date, however, many key technologies required for a working SC computer—such as logic circuits, component interconnects, and most notably cryogenic memory—have not been developed. But the Intelligence Advanced Research Projects Activity (IARPA) has determined that, thanks to recent research progress, the “foundations for a major breakthrough” are now in place, and has launched a multi-year program to investigate the practical viability of SC computing.
NIST scientists have been engaged to develop the necessary metrology and evaluation methods for the IARPA program; but long before the program began they had been focusing on one of the most stubborn obstacles to SC computing: the lack of a memory system that can work at the cryogenic temperature and blazing speed of the JJ switches while also requiring minimal operating energy.
The NIST team’s memory module, described in a 2014 paper and elaborated and further tested in a new publication, is a modified Josephson junction with dimensions on the scale of 100 nm. Between the two superconducting junction electrodes, the scientists fabricated a multi-layer barrier consisting of two different magnetic materials separated by a non-magnetic metal.
The relationship between the polarity of the two magnetic layers—which can be aligned either the same (parallel) or opposite (anti-parallel)—determines the magnitude of the supercurrent in the Josephson junction, and whether there is zero or non-zero voltage across the junction. That effect is based on the intricate competition between superconductivity and magnetism that was unambiguously demonstrated in the NIST team’s work. Those two current or voltage states can represent 0-or-1 binary values for superconducting digital computer memory. The device size can be reduced—as will be necessary for high-capacity memory—without losing the state-differentiating capability.
The magnetic properties of the barrier can be controlled simply via electric currents through the device instead of magnetic field. This is accomplished through a process called spin-transfer torque: A normal current, with an even distribution of spins, passes through the fixed magnetic layer, which acts as a filter such that the electrons emerging from it are spin-polarized. The angular momentum associated with that spin state is then transferred to the free layer, changing its magnetic alignment. The process is reversible. This effect has been widely studied for room-temperature magnetic memories, but generally for memories based on resistance change (magnetoresistance).
Both read and write operations are scalable for nanodevices. Read can be performed by probing the strength of the superconductivity with a miniscule energy. The write energy can be improved with magnetic material engineering and reduced device size; the ultimate limit is given by the magnetic energy which is also miniscule. Combined with nonvolatility (no need for refreshing) and speed, this superconducting-magnetic hybrid promises an alternative technology to charge-based semiconductor memories.
Other groups have developed superconducting-magnetic hybrid devices of various sorts. But the NIST module is the first to employ spintronic effects, which are particularly hard to characterize on the nanoscale. The NIST hybrid can be easily integrated with SC systems, and the NIST researchers are now examining the behaviors of different barrier configurations and materials under various conditions for use in memory and other functions.
“The combination of low-loss superconducting logic and nonvolatile, hybrid magnetic memory could revolutionize mainframe computation and data storage within a decade,” says Ron Goldfarb, leader of the NIST Magnetics Group and a supporting member of the NIST team. “The recent NIST work demonstrating spintronic switching of hybrid magnetic-superconducting memory devices was a vital proof of principle. Other groups on contract to IARPA are working on different implementations. Because of its measurement expertise and impartiality, NIST will be responsible for testing for IARPA.”
Looking ahead, Goldfarb says, “The development of entirely new kinds of computer processors beyond the limits of semiconductors is a burgeoning area of interdisciplinary research. This includes new types of computer logic, main memory, cache memory, and mass storage for supercomputers, nondigital image processors, and massive data centers. From a measurements perspective, there is a need to test, prototype, and benchmark the reliability, reproducibility, energy dissipation, and high speed performance of these components, devices, circuits, and their constituent materials.”