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Notes from Day One of SEMICON West

By R&D Editors | July 29, 2015

The first day of the annual SEMICON West conference in San Francisco saw over 1,000 booths and over 600 exhibiting companies on the floor. A session on market updates was held – the semiconductor market forecasts are going down. For example, Gartner lowered their forecast to 2.2 percent, and the average among forecasters is currently around 4 percent, thanks in part to the weakness of the Euro and the Yen. Memory and foundry spending are trending upward this year, while logic spending has plateaued.
 

CONFERENCE AGENDA ANNOUNCED:

The highly-anticipated educational tracks for the 2015 R&D 100 Awards & Technology Conference feature 28 sessions, plus keynote speakers Dean Kamen and Oak Ridge National Laboratory Director Thom Mason. Learn more.

Day One’s keynote panel, on the subject of scaling the walls of sub-14nm manufacturing, included representatives from IMEC, ASE, Qualcomm, Stanford University, and Global Foundries. Topics discussed included the complex technologies of 10nm and 7nm, as well as how cost-effective they might be; end-to-end yield, including both packaging yield and system yield; the increase of I/O and the decrease in die size; and bug fixes in power management functions.

Another session, with representatives from Micron, Everspin, Objective Analysis, and Terraron, discussed 3DNAND, MRAM, and RRAM, and the scaling of 3D devices.

Discussions about wearables also took place at SEMICON West. The good news is that the wearables industry is poised to grow exponentially in the next few years, and the semiconductor market will play a large role in this; however, the bad news is that wearables present a high-volume yet low-profit opportunity. U.S. investors are not as interested in semiconductors as they once were. Experts are eyeing the Chinese semiconductor market to see if things will take off, and if electronic device manufacturing will continue to move there from the U.S. and Europe. 

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