Rice Univ. graduate student Jun Yao holds a memory chip made of silicon oxide. This chip will spent two years at the International Space Station as part of an experiment, HiMassSEE, to test it for susceptibility to radiation. Photo: Jeff Fitlow/Rice Univ. |
Rice Univ. will send an experiment to the
International Space Station (ISS) later this year. If all goes perfectly, it
will be precisely the same when it returns two years later.
Memory chips made of silicon oxide, the product of a breakthrough last year
by the labs of Rice chemist James Tour, physicist Douglas Natelson and
electrical and computer engineering professor Lin Zhong, will go aloft aboard a
Russian Progress cargo ship in August for a lengthy stay at the ISS to see if
radiation affects their nanoscale circuits.
Tour, Rice’s T.T. and W.F. Chao Chair in Chemistry as well as a professor of
mechanical engineering and materials science and of computer science, said the
experiment is meant to show how well the sub-5-nm circuits stand up to the
rigors of space, where constant bombardment by solar and other cosmic radiation
poses an ever-present danger to both equipment and personnel.
Memory chips being created at Rice will be collected by NASA soon and
packaged with other types of nonvolatile memories that don’t depend on having
to carry a charge, as common flash memory does.
They will be sent to Russia
to fly on Progress 44, a cargo mission, as part of the HiMassSEE experiment.
The intention is to characterize the effects of primary and secondary ionizing
radiation on such circuitry.
Steven Koontz, ISS system manager for space environments, said, “We
want to look at what happens at high shielding mass (that is, inside the ISS
itself). The original motivation, and the largest part of the flight experiment
content, really has to do with questions that are beginning to come up about
secondary particle showers.”
When nuclei collide at high energies, they scatter secondary particles in
every direction—just the kind of thing scientists are studying at places like
the Large Hadron Collider and Brookhaven National Laboratory (a collaborator on
HiMassSEE).
“When a heavy nucleus strikes a nucleus in the spacecraft, events that
look like cosmic rays or showers are expected to occur,” Koontz said.
“We have been successfully ignoring those for many years because
microelectronics didn’t contain high-Z elements. They do now.” Elements
with high atomic numbers—tungsten, hafnium, lead, and gold—are susceptible to
disruption and raise the probability of failure in electronic components that
use them, he said.
But silicon oxide circuits devised last year by Jun Yao, a graduate student in Tour’s lab,
contain no heavy metals, which makes them less likely to be destroyed by flying
nuclei. Yao
discovered that sending a current through silicon oxide, an insulator, could create
a conductive pathway of silicon crystals. Electrical pulses could then
repeatedly break and reconnect the pathway. That can be read as zero or one,
the basic element of computer memory.
“The probability of a radiation event hitting that sub-5-nm wire is so
small that it probably would never even get hit,” Tour said. Earth-bound
bombardment of silicon oxide circuits confirmed his suspicion. “In all of
our tests, they’ve never been hit. So I presume it’s going to work very well.
And even if a circuit does get hit, you’ve only lost one memory bit. We’re
sending thousands of them.”
Silicon oxide memory got wide attention last year for its potential to
extend the boundaries of Moore’s
Law, which posits that integrated circuits would double in power every 18
months.
Computer scientists have long thought Moore
would be no more once circuits got as small as 10 nm wide. Current commercially
available processors sport 32-nm circuitry, and 28-nm fabrication is starting
to come online.
While powerful computers are essential to space technology, power is less of
an issue in this experiment than the ability to maintain coherence in the
hostile environment of space, particularly for satellite circuitry or for
missions to Mars and beyond.
The container holding the Rice chips, about the size of an Altoids tin, will
stay inside the ISS with the rest of HiMassSEE. Rice’s part of the experiment
will return to campus in two years to be compared with identically configured
chips that will remain at Tour’s lab.
Yao made the
centimeter-square chips in a Rice clean room. Although he will be long gone,
doctorate in hand, when his chips come down to Earth, he said, “I’m
excited because it’s the first time in the Tour Group that something fabricated
in the lab has been taken into space.”
The work is being done via the NASA-funded Small Business Innovation
Research program administered through PrivaTran LLC.