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Cray to Add Intel Xeon Phi Coprocessors to Cascade Supercomputer

By R&D Editors | June 19, 2012

Cray to Add Intel Xeon Phi Coprocessors to Cascade Supercomputer

 

At the 2012 International Supercomputing Conference in Hamburg, Germany, global supercomputer manufacturer Cray Inc. announced that the Company’s next-generation supercomputer code-named “Cascade” will be available with Intel Corporation’s new Intel Xeon Phi coprocessors. The Intel Xeon Phi product family is based on Intel’s Many Integrated Core (Intel MIC) architecture, which is designed for highly parallel workloads.

                                                                                 

Cray’s next-generation Cascade supercomputer, which is expected to be available in the first half of 2013, is the next step in Cray’s Adaptive Supercomputing vision. The system will feature a continuing evolution of the Cray Linux Environment, Cray’s HPC-optimized programming environment, and the next-generation system interconnect, codenamed “Aries.” Cascade will be able to handle a wide variety of processor types, including Intel Xeon processors E5-2600 product family — a first for Cray’s high-end systems – and now the Intel Xeon Phi coprocessor, further extending the flexibility of Cray supercomputers.

A number of leading HPC centers have already signed contracts with Cray to purchase Cascade systems. In October 2010, Cray announced it had signed a contract with the University of Stuttgart to provide a Cascade system to the High Performance Computing Center Stuttgart (HLRS) in Germany. In December 2011, Cray announced it was awarded a contract to provide a Cascade supercomputer to the Academic Center for Computing and Media Studies (ACCMS) at Kyoto University in Kyoto, Japan.

 

The Cascade supercomputer is made possible in part by Cray’s participation in the Defense Advanced Research Project Agency’s (DARPA) High Productivity Computing Systems program.

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