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Google teases Synaptics edge AI chip ahead of Oct. 20 launch

By Brian Buntz | October 16, 2026

Google and chipmaker Synaptics are previewing a microcontroller designed to bring multimodal AI to devices constrained by power, memory and cost, from wearables to industrial sensors. Synaptics CEO Rahul Patel outlined the chip’s capabilities Oct. 14 at Google Research’s annual Research@ event in Mountain View, ahead of its formal launch Oct. 20. It combines Google’s Coral neural processing unit with Synaptics’ Torq NPU and Arm CPUs, and Patel said it will find its way into Google devices.

Google develops both AI processors, known as tensor processing units (TPUs), and AI models such as Gemini, allowing it to design the hardware and software together. “This is a great opportunity for co-design,” said Avinatan Hassidim, vice president of Google Research. A 2017 study by Google researchers reported 30–80 times higher performance per watt than the Intel Haswell CPU and Nvidia K80 GPU tested on production neural-network inference workloads.

For edge devices, Hassidim described ambient AI that can act on a user’s context while keeping personal information on the device, responding quickly and preserving battery life. Existing edge chips consume too much energy and respond too slowly for those experiences, he said, while a fragmented market of proprietary designs makes development and deployment difficult. “With Coral, we want to address this challenge,” he said.

Google introduced Coral’s first milestone last year, a front end based on RISC-V, an open instruction set architecture. The second milestone, M2, adds the first Coral vector processor and is built into the Synaptics chip.

Hassidim said M2 uses 40% less energy than other processors on the market and can run on-device inference at an average draw of less than 6 milliwatts. He did not specify the workloads or the processors used for comparison.

The chip is the newest part in Synaptics’ Astra line of AI-native processors and microcontrollers, the product of 18 to 24 months of work with Google Research, Patel said. He did not say which Google devices would use it or when they would ship. Synaptics plans to formally unveil the chip at its Oct. 20 Tech Day in San Jose, with a noon press and analyst briefing and a demonstration showcase.

Patel highlighted the microcontroller’s support for high-density DRAM, describing memory capacity as a source of scalability. The chip can process voice, vision, motion and contextual sensing simultaneously and includes GPU and multimedia processing and hardware-rooted security. Target applications range from battery-powered wearables to industrial vision systems and cameras.

The chip supports an open-source compiler that Synaptics and Google Research developed over 18 months, built on MLIR (Multi-Level Intermediate Representation). It also works with standard machine learning frameworks and model formats. “You are free from the walled-garden software plays you are used to with microcontrollers,” Patel said. Developers can already prototype on Coralboard, a development platform launched earlier this year that pairs the Coral NPU with Synaptics Astra processors.

Google has pursued other chip partnerships beyond the data center. In 2023, it and Qualcomm announced work on a RISC-V wearable platform for Wear OS, including the supporting software ecosystem. With Synaptics, the collaboration includes Google’s Coral accelerator design and an open compiler stack, targeting microcontrollers for wearables and industrial devices.

Beyond the M2 design shown at Research@, Google is developing Coral to run small language models on-device. Hassidim said the next design, M3, is complete and adds native 32-bit floating-point support to run Gemma 3 270M, a compact language model with 270 million parameters. Synaptics has committed to chips based on future Coral designs, but neither company gave a shipping date for M3-based silicon.

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