Quantum computing hardware advance slashes superinductor capacitance >60%, cutting substrate loss

Reducing performance-killing noise from chip substrates is key for advancing quantum computing. Addressing this challenge, Lawrence Berkeley National Laboratory scientists developed a practical chemical etching process that precisely lifts vital superconducting components, superinductors, just above the wafer surface. This suspension method directly targets stray capacitance and substrate-related loss channels by minimizing physical contact. The research was published in Applied Physics Letters.

Tests using circuits (resonators and qubits) built with these suspended superinductors—often constructed as arrays of Josephson junctions, which are non-linear circuit elements crucial for creating the quantum effects utilized in superconducting qubits—confirmed their improved quality. By curbing unwanted electrical interactions with the substrate, this fabrication technique enhances component performance by potentially lowering signal loss. Ultimately, the technique offers a practical route to quantum devices that are more robust against environmental noise.

“Reducing noise induced by defects in qubits is a goal that scientists around the world have been chasing for decades. It’s a challenging problem to solve,” explained study co-author David I. Santiago, who leads the Quantum Information Science & Technology group at Berkeley Lab, in a release. “But we think that our fabrication technique—a simple chemical etching approach—could be the missing ingredient for anyone who makes superconducting microchips or components for qubits.”

This focus on developing manufacturable solutions for noise reduction aligns with the goals of the Quantum Systems Accelerator (QSA) at Berkeley Lab, which supported the work detailed in the Applied Physics Letters study. QSA director Bert de Jong emphasized the broader implications: “Knowing how to make noise-resistant qubits will allow us to advance more efficient quantum computers directed at solving the scientific problems that are key to the Department of Energy’s mission.”

In the future, the Berkeley Lab team plans to apply this fabrication technique directly to building qubits, potentially integrating them into more complex 3D architectures. The researchers emphasize that the etching framework demonstrated is versatile; it’s broadly compatible with various superinductor types and planar circuit designs beyond the Josephson junction arrays tested. This adaptability paves the way for scalable superconducting architectures using improved components. It also provides a platform for systematically investigating and mitigating the fundamental loss mechanisms originating from device substrates, which could be an important step toward fault-tolerant quantum computers.