Materials startup Thintronics takes aim at Ajinomoto’s chip packaging film, with surging AI demand widening the opening

One facet of modern semiconductor manufacturing that often gets little attention is the dominance of Ajinomoto, the company that first commercialized monosodium glutamate (MSG) in 1909. The Japanese firm holds more than 95% of the market for Ajinomoto Build-up Film (ABF), the insulating film used in high-performance semiconductor package substrates, according to the company. In essence, ABF separates the layers of copper wiring beneath the chips.

“Every chip sits on a substrate. It’s very simple, and there’s one company controlling it. It’s crazy,” says Stefan Pastine, Ph.D., founder and CEO of Thintronics.

Alameda, California-based Thintronics is betting that its interlayer dielectric technology can give substrate manufacturers another source while reducing signal loss in high-speed connections. In July, the company signed a letter of intent with the U.S. Department of Commerce for up to $50 million in proposed CHIPS R&D incentives; a final award remains subject to further diligence and department approval. Pastine says Thintronics is putting out its first substrate, with a fabless chip company helping foot the bill.

Thintronics’ bet: new chemistry, vertical integration

Since Thintronics secured a Series A extension in 2024, the company has been in build mode, assembling teams that span chemistry, systems engineering and manufacturing. “We’re pretty cross-functional,” Pastine says. “What we’re doing differently is vertically integrating the skill set, from the molecules that go into our product, to understanding how our product affects system-level AI data center power and performance, to the processing and manufacturing of our product. So we’ve been building those teams and laid a pretty good foundation.”

Pastine, an organic chemist who previously co-founded Connora Technologies, a recyclable-thermoset startup acquired by Aditya Birla Chemicals in 2019, expects Thintronics’ focus on novel chemistry to provide a durable advantage. “It’s like Tesla versus GM on the electric car; you still have your legacy business,” he says. “And even the legacy technology itself has to scale.”

The need for alternatives to ABF is not new, but building a credible alternative is a heavy lift. “It’s a whole different technology with its own scope and limitations, its own problems to work through, its own processing,” Pastine says. “The bet we’re taking is to put everything under one tight-knit roof. If you can’t manufacture it, if it’s not processable, it doesn’t matter. You need to invest in the tools our customers have. Then you have to have electrical engineers here. That’s why it’s a substantial investment.”

Bigger AI chips, more layers, one supplier

In the meantime, the AI wave is putting pressure on the ABF supply chain in terms of sheer volume as well as complexity. A typical CPU a decade ago sat on a substrate with about four to six ABF build-up layers. The latest AI accelerator packages run to 20 to 24 layers and as large as 14,000 square millimeters, according to SemiAnalysis data cited by Taiwan’s TechNews. Nvidia’s new Rubin GPU reportedly requires 123% more substrate area than the Blackwell architecture that debuted in 2024. In August, Korea’s Edaily reported that Ajinomoto, running its ABF lines at close to full capacity, had begun prioritizing supply for AI and other high-end chips. Ajinomoto CEO Shigeo Nakamura has said the company can meet demand through 2030, but its next ABF plant isn’t slated to start production until 2032.

Substrate suppliers are also raising prices faster than TSMC as AI compute additions climb from roughly 30 GW this year toward 50 GW in 2027, SemiAnalysis founder Dylan Patel said on the Dwarkesh Podcast in August.

“There are still shortages, and it’s going to get worse, because there’s an exponential increase in volume from AI data centers,” Pastine says. “We think the market is going to grow 10 times in less than four or five years. That means there’s going to be a huge supply chain issue.”

Supply, though, is only half of the pitch. “We’re keyed on the performance side,” Pastine says. “So, solve both.”

The last mile runs through the substrate

For decades, the substrate was an afterthought in system design. Performance gains came from shrinking transistors, from 15 nm to 7, 5 and 3 nm, and the copper channels linking chips could afford to be lossy because signaling frequencies were low. “It still went from A to B,” Pastine says. When ABF entered mass production in 1999, the fastest data center links were about to reach 10 Gb/s, signaling at roughly 5 GHz; 448G links signal at 112 GHz, more than 20 times higher.

At 2 nm and below, that calculus has changed. With transistor scaling slowing, the industry has turned to heterogeneous integration and advanced packaging, and today’s massive AI chips must constantly talk to one another, to other racks and to the network. Those signals travel electrically through the substrate until they reach optics. Links being installed now run at 224G PAM4, which signals at 56 GHz; the next generation, 448G, doubles that. Once a signal reaches the optical network, the power penalty largely disappears, which Pastine says explains the industry’s interest in co-packaged optics. Everything before that point runs on the substrate. “It’s the last-mile delivery problem,” he says.

That last mile is where today’s Interlayer Dielectrics (ILD chemistry, developed roughly 25 years ago with Intel as a driving force, hits what Pastine calls a physics wall. Conventional ILDs are polar, and polar materials at high frequency produce dielectric loss. Every channel has a budget for how much signal can be lost between endpoints, and exceeding it even slightly means the signal doesn’t arrive. “If you go just a little over the margin, it’s over,” Pastine says. Existing materials run about 10 dB over that budget on standard 448G data center channels, from long reach to very short reach, by Thintronics’ calculations. The Optical Internetworking Forum (OIF) and other industry groups are still defining 448G channel budgets, and some vendors see a path to closing high-loss channels with heavier signal processing, at the power cost Thintronics is targeting.

Thintronics’ approach, Pastine says, is to change the dielectric chemistry so high-frequency signals can travel through the substrate with less loss.

To compensate for signal loss, manufacturers need extra circuitry on the silicon or additional components, and both cost power. The tab comes to roughly 35 kilowatts more per rack, plus about $200,000 in extra chips that draw still more power, according to the company’s estimate. “Why are we hooking up a power plant to the system?” Pastine asks. “When something hyperscales, and every piece of the chain isn’t optimized, there’s always a tax.”

For Pastine, those system-level costs have brought attention to a materials problem that predates the AI boom. “This technology could have been invented 20 years ago,” he says. “We didn’t need AI to do what Thintronics does.” While much of the attention in the AI race is, predictably on the final chips, Thintronics sees an opportunity for innovation at a more foundational layer “There’s a point somewhere lower in the value chain that hasn’t been innovated on, that’s not operating near its potential, and it’s going to create a problem, which is an opportunity.”