A novel, high-frequency electronic chip potentially capable of transmitting tens of gigabits of data per second — a rate that is orders of magnitude above the fastest internet speeds available today — has been developed by engineers at the University of California, Davis.
Omeed Momeni, an assistant professor of electrical and computer engineering at UC Davis, and doctoral student Hossein Jalili designed the chip using a phased array antenna system. Phased array systems funnel the energy from multiple sources into a single beam that can be narrowly steered and directed to a specific location.
“Phased arrays are pretty difficult to create, especially at higher frequencies,” Momeni said. “We are the first to achieve this much bandwidth at this frequency.”
The chip prototyped by Momeni and Jalili successfully operates at 370 GHz with 52 GHz of bandwidth. For comparison, FM radio waves broadcast between 87.5 and 108 MHz; 4G and LTE cellular networks generally function between 800 MHz and 2.6 GHz with up to 20 MHz of bandwidth.
Most modern electronics are designed to operate at lower frequencies. However, the growing demand for faster communication, and new and emerging applications of sensing and imaging are driving the creation of technologies that function at higher frequencies.
Reaching speed limit of 4G networks
“Theoretically, 4G cellular networks have reached their data rate limit,” Momeni said. “As we continue to migrate to systems like cloud computing and next generation cellular networks, the need for speed is growing. Higher frequencies mean more bandwidth and more bandwidth means higher data rate.”
The tiny piece of hardware designed by Momeni and Jalili is evidence that it is possible to harness the large available bandwidth at millimeter-wave and terahertz bands on a single, compact chip. This is an important step toward the development of scalable systems that can be used to sharpen technologies like spectroscopy, sensing, radar, medical imaging and high-speed communication.
In future work, Momeni plans to integrate the chip into imaging and communication systems.