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DARPA Announced Researcher Teams Tasked With Modernizing System-on-Chip Design Technology

By Kenny Walter | August 8, 2018

Research teams across academia, industry and the government are attempting to simplify and lower the design costs for System-on-Chip (SoC) platforms that will ultimately improve national security.

The Defense Advanced Research Projects Agency (DARPA)—part of the U.S. Department of Defense— unveiled the teams and details for their two programs under the Electronics Resurgence Initiative (ERI) during the first annual DARPA ERI Summit in San Francisco on July 23.

The research teams taking part in the Intelligent Design of Electronic Assets (IDEA) program and the Posh Open Source Hardware (POSH) program hail from the University of California, San Diego; Northrop Grumman Mission Systems; Cadence Design Systems, Xilinx; Synopsys; the University of Southern California; Princeton University; and the U.S. Department of Energy’s Sandia National Laboratories.

Initially announced almost a year ago, IDEA and POSH are part of the ERI “Page 3” programs, which includes a total of six programs that aim to dramatically lower the barriers to modern SoC design and move towards a new era of circuit and system specialization and innovation.

The 11 research teams taking part in the IDEA program hope to create a “no human in the loop” layout generator to enable users with limited electronic design expertise to complete the physical design of electronic hardware in about a day. The new software would automatically create circuit design files for manufacturing, while reducing the time from years to 24-hours.

The researchers will apply machine-learning techniques to evolve and improve the performance of the layout generator for digital circuits, mixed-signal integrated circuits, systems-in-package and printed circuit boards.

“Through the IDEA program, DARPA aims to eliminate the [U.S. Department of Defense] DoD’s resource and expertise gap associated with custom electronic hardware design for the most advanced technologies by enabling full automation and applying machine intelligence,” Andreas Olofsson, the Microsystems Technology Office program manager leading IDEA and POSH, said in a statement.   

The POSH program hopes to significantly reduce the effort needed to start new mixed-signal SoC designs by building a foundation of verified IP building blocks with known functionality. They will hopefully create an open source SoC design and verification ecosystem that could enable the cost-effective design of ultra-complex SoCs.

“To help democratize access to custom, high-performance SoCs, the POSH program seeks to develop a sustainable ecosystem of open-source IP and accompanying validation tools,” Olofsson said. “Through POSH, we hope to eliminate the need to start from scratch with every new design, creating a verified foundation to build from while providing deeper assurance to users based on the open source inspection process.”

Researchers are hopeful they can developed a software-based, automated physical layout generator and an open-source intellectual property ecosystem that can result in a 24-hour design cycle for DoD hardware systems. They also hope to shorten upgrade cycles and enable the proliferation of custom commercial and DoD-specific SoCs.    

SOCs often require complex software and include billions of transistors that can stretch to miles of electrical wiring that are integrated within a small chip.

ERI is a five-year, upwards of $1.5 billion investment to jumpstart innovation in the electronics industry. For more information about the Electronics Resurgence Initiative and the ERI Summit, please visit: http://www.eri-summit.com/.

President Dwight D. Eisenhower created DARPA in 1958 in direct response to the Soviet Union launching Sputnik 1 in 1957. Independent from other military research and development, DARPA researchers executes projects to expand the frontiers of technology and science, often beyond the immediate requirements of the U.S. military.

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